Operating System
OS Part-1
OS Part-2
- File Concepts and Access methods
- Free Space Management and Allocation methods
- Directory Systems and Protection
- File Organization, Sharing and Implementation issues
- Disk and Drum Scheduling
- I/O Devices Organisation & I/O Buffering
- I/O Hardware, Kernel I/O subsystem and Transforming I/O Requests to Hardware Operations
- Device Drivers and Path Management
- Device Driver Sub Modules and Procedure
- Device Scheduler and Handler
- Interrupt Service Routine (ISR)
- File System in Linux and Windows
OS Part-3
- Process and Process Control Block(PCB)
- Process Scheduling( Preemptive and Non Preemptive)
- Scheduling Algorithms
- Algorithm Evaluation
- Multiple Processor Scheduling
- Real Time Scheduling
- Operations on Processes
- Threads
- Inter-Process Communication
- Precedence Graphs
- Critical Section Problem
- Semaphores
- Classical Problems of Synchronization
- DeadLock
- Deadlock Prevention and Avoidance
- Deadlock Detection and Recovery
- Process Management in Linux
OS Part-4
- Memory Hierarchy in OS
- Concepts of Memory Management
- MFT and MVT
- Logical and Physical Address Space
- Swapping
- Contiguous and Non Contiguous Memory Allocation
- Paging
- Segmentation
- Paging Combined with Segmentation
- Structure and Implementation of Page Table
- Virtual Memory in OS
- Cache Memory Organization
- Demand Paging
- Page Replacement Algorithms
- Allocation of Frames and Thrashing
- Demand Segmentation
OS Part-5
- Distributed Operating System: Introduction and Types
- Distributed OS: Design Issues
- Distributed OS: File System
- Distributed OS: Remote File Access
- Remote Procedure Call(RPC)
- Remote Method Invocation(RMI)
- Distributed Shared Memory
- Parallel Processing and Concurrent Programming
- Security and Threats Protection in Distributed OS
- Security Design Principles and Authentication in Distributed OS
- Sensor Network and Parallel OS
Structure & Implementation of Page Table in Operating System
Introduction
Paging ek memory management technique hai jo logical address space ko equal-sized pages me divide karti hai, aur physical memory ko frames me todti hai. Page Table ek data structure hota hai jo har process ke pages ka mapping store karta hai.
Why Page Table?
Process ka Logical Address → Physical Address me translate karne ke liye Page Table ka use hota hai.
Har page ka corresponding frame number store hota hai.
Efficient Memory Access aur Protection provide karta hai.
Structure of Page Table
Page Table ek array hota hai jo har page ke liye ek entry store karta hai.
Ek Page Table Entry (PTE) me following information hoti hai:
| Page Table Entry | Description |
|---|---|
| Frame Number | Page ko kaunse physical frame me store kiya gaya hai |
| Present/Absent Bit | Page memory me hai ya nahi |
| Protection Bits | Read/Write/Execute permissions |
| Dirty Bit | Page modify kiya gaya hai ya nahi |
| Access Bit | Page recently access hua hai ya nahi |
| Cache Disabled Bit | Page cache me store hoga ya nahi |
Diagram: Page Table Example
Example: Agar CPU Page 1, Offset 300 ka address generate kare, aur Page 1 ka Frame 9 ho, to:
Physical Address=(9×Frame Size)+300
Implementation of Page Table
Page Table ko implement karne ke liye multiple techniques use hoti hain:
Single-Level Page Table
Simple & Direct Mapping
Har process ke liye ek single page table hota hai jo logical pages ko physical frames se map karta hai.
Disadvantage: Agar process bada ho, to bohot saari page table entries create hoti hain, jo extra memory consume karti hai.
Diagram:
Multi-Level Page Table
Page Table ko multiple levels me todna
Badi page table ko chhoti page tables me divide karna.
Translation me thoda time lagta hai, lekin memory utilization improve hoti hai.
Diagram:
Page Directory → Points to Multiple Page Tables → Points to Frames
Inverted Page Table
Memory-efficient technique
Instead of storing mapping for every page, yeh frames ke basis pe mapping store karta hai.
Disadvantage: Page lookup time zyada hota hai kyunki har frame ke liye search karna padta hai.
Diagram:
Comparison of Page Table Techniques
| Technique | Advantage | Disadvantage |
|---|---|---|
| Single-Level Page Table | Simple Implementation | High Memory Usage |
| Multi-Level Page Table | Saves Memory | More Lookup Time |
| Inverted Page Table | Efficient for Large Memory | Slow Page Searching |
Conclusion
Page Table ek important data structure hai jo logical address ko physical address me translate karta hai. Different implementations available hain jaise Single-Level, Multi-Level, aur Inverted Page Table. Efficient memory management ke liye Page Tables me TLB (Translation Lookaside Buffer) ka bhi use hota hai.